Field Programmable Gate Arrays (FPGAs)  are general-use, reconfigurable chips that are used for a particular workload or for ASIC prototyping. An FPGA allows massive data parallelism and can achieve speed and energy consumption improvements in orders of magnitude compared with a generic processor.  They are very popular in video processing, digital signal processing, cryptography, data compression, machine learning and AI, auto, aerospace and military applications. An FPGA can be programmed multiple times until the desired functionality for a circuit is obtained or it can updated even if a bug is found later in the production stages. ASICs don’t have this kind of flexibility and bugs found in production may sometimes be catastrophic for the chip’s functionality. FPGAs are composed of configurable logic blocks or CLB (contains look-up tables, combinational logic and flip-fops), programmable interconnects (interconnects + switch matrix), and I/O pads. To “program” an FPGA means to emulate the functionality of a digital circuit using the FPGA fabric. This is usually achieved by using a Hardware Description Language like Verilog or VHDL. The Synthesis tool will map the circuit to the existing FPGA configurable logic and will use the programmable interconnects to connect these blocks between them. The FPGA is configured by downloading a bitstream inside it and the 1/0 bits will enable or disable the functionality of the CLBs and of the interconnects.

Types of FPGA

If we analyze the internal structure of an FPGA we have three categories: Symmetrical Arrays, Row-based architecture, and Hierarchical PLDs.

Symmetrical Arrays FPGAs

This architecture consists of a rectangular array of logic blocks separated by channels containing routing resources (interconnects + switches). These blocks can be programmed to implement any desired function and are connected with the outside environment by using the I/O blocks. The function of the I/O blocks are used for tri-state control, output transition speed, pullp-up ori pull-down. The fastest interconnection is between adjacent blocks while the delay increases with the distance between the CLBs.

Row-based architecture

The CLBs are grouped in rows with programmable interconnects placed between them. The I/O blocks are at the edge of the structure. Complex circuits are emulated by connecting adjacent rows via vertical interconnects.

Hierarchical PLDs

Hierarchical PLDs have a more complex layout. The top level is composed of logic blocks and interconnects. The logic blocks contain logic modules, which have combinatorial and sequential functional elements. The functional elements are controlled by the configuration bitstream stored inside the FPGA. The I/O blocks are placed at the edge of the system, shrouding the logic blocks and the interconnects.

FPGA programming technologies

Since the FPGA fabric is reconfigurable it needs a storage mechanism for the bitstream that will enable / disable the configurable logic and the programmable switches. There are three main technologies:

1. SRAM-based FPGAs: When the power source is turn on static RAM cells are loaded with the bitstream value. The FPGA requires an external flash memory for storing the bitstream while the power is OFF. The FPGA loses its configuration each time the power is shut down returning to its unconfigured state (volatility).
2. Antifuse-based FPGAs: This makes the FPGA one-time programmable because a fuse is burnt when the bitstream is loaded. This makes the FPGA non-reprogrammable but the advantage is that it will retain the functionality even with no power.
3. Flash-based FPGAs: The FPGA has internal FLASH memory to retain the configuration when powered down. This eliminates the need for an external memory and the device can be reprogrammed while the FLASH cells are functional.

Modern FPGAs

Cyclone V FPGA (source)

Modern FPGAs are composed of Adaptive Logic Modules (ALM) and Logic Elements (LEs) connected using programmable interconnects. Besides the ALMs and LEs a modern FPGA may have a processor core (like the Xilinx Zynq family), Transceivers, Hard IP blocks like PCIe, dedicated Digital signal Processing engines, and even analog modules like programmable PLLs (Phase Locked Loop – used to generate clock signal), and integrated Analog-to-Digital Converters (XADC from Xilinx)

Why use an FPGA?

It is a very cheap solution for prototyping and also for low-volume flexible products. In terms of costs FPGAs vary from tens of dollars to thousands of dollars and you always must select one that fits the throughput and financial budget of your system. The same RTL code (Verilog or VHDL) can be implemented in an ASIC if needed later, and it is an important for measuring the performance of a specific circuit. For example companies that sell soft cores (Intellectual Property or IP) use FPGAs to profile the performance of their circuits in terms of maximum frequency, power, consumed logic gates and throughput. FPGAs are also a great solution as accelerators in heterogeneous systems where a standard low-power CPU is used to control a system and the FPGA is used to process compute intensive payloads while the CPU is idle or performs other task (video, encryption, etc…).

Is it hard to become an FPGA designer?

Most posts on the Internet promote that it is very hard to understand Hardware Description Languages (like Verilog) that’s why many engineering students choose other niches to work after they finish their faculty. If I look back at my journey the hardest part about Verilog and FPGAs was the fact that I wasn’t aware about what I was doing. The most challenging part was to know how to code synthesizable designs for FPGA using Verilog. If you’re a beginner (you don’t have high speed / large area / complex designs) a good path to follow would be to first understand how Verilog HDL code works for Digital Circuits Design and Functional Verification, and your FPGA journey will become much easier. I had the same problem for years and faced much bigger challenges that I should of because I didn’t knew back then how important is to understand the correspondence between Verilog code and actual digital circuits. Another thing that I didn’t had were some clear practical steps to develop my skills in Verilog… After 10 years of industry experience and a Ph.D involving FPGAs and Verilog, I developed a simple practical tool that will help you easily master Verilog HDL. It contains all things I wished I’d knew when I started my journey 10 years ago.  Find out more…